When developing an EP endpoint driver using the KWDF framework, is it possible to achieve device reset by triggering a hot reset of the PCIe root port?

hualong zhang 0 Reputation points
2025-11-05T08:50:33.4333333+00:00

I am encountering device reset requirements while developing a KWDF driver for a PCIe endpoint device.

  1. The current endpoint device under development does not support Function-Level Reset (FLR), so the only option is to achieve hot reset by modifying the Secondary Bus Reset bit in the bridge controller register of its upstream PCIe root port's configuration space.
  2. Testing with the setpci tool has confirmed that modifying the Secondary Bus Reset bit at offset 0x3E of the upstream root port's register successfully resets the downstream endpoint device.

Key Questions:

In endpoint device driver development, are there standard APIs or methods to safely access and manipulate the configuration space of the upstream root port?

  1. Is such functionality permitted within the Windows driver development framework? What would be the specific implementation approach?

Test Example:

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