Share via


CARD_CONFIG_INFO

This structure contains PC Card configuration information. It is passed to the CardRequestConfiguration function. All members are input only.

typedef struct { 
  CARD_SOCKET_HANDLE hSocket; 
  UINT16 fAttributes; 
  UINT8 fInterfaceType; 
  UINT8 uVcc; 
  UINT8 uVpp1; 
  UINT8 uVpp2; 
  UINT8 fRegisters; 
  UINT8 uConfigReg; 
  UINT8 uStatusReg; 
  UINT8 uPinReg; 
  UINT8 uCopyReg; 
  UINT8 uExtendedStatus; 
  UINT16 fExtRegisters;
  UINT8 IOBase[4];
  UINT8 IOLimit;
} CARD_CONFIG_INFO, *PCARD_CONFIG_INFO;

Members

  • hSocket
    Handle to a socket and function pair.

  • fAttributes
    Contains a bit mask for specifying interrupt request (IRQ), direct memory access (DMA), and voltage options.

    Value Description
    CFG_ATTR_IRQ_STEERING Enables IRQ steering in the socket controller.
    CFG_ATTR_ENABLE_DMA Enables DMA.
    CFG_ATTR_IRQ_WAKEUP Allows PCMCIA interrupts to wake the system. This requires the system to be capable of waking on card detect CSC events as well as functional IRQ interrupts. The socket will be powered down during suspend if this flag is set.
    CFG_ATTR_KEEP_POWERED Keeps the PCMCIA bus powered during suspend.
    CFG_ATTR_NO_SUSPEND_UNLOAD This bit will be used if all functions of a given socket request the behavior, or, if the system is capable of waking on card detect CSC events. It will also be used if the socket is flagged as non-user accessible.

    Microsoft recommends that you do not unload the driver during a suspend unless it is absolutely necessary.

  • fInterfaceType
    Contains a bit mask specifying memory or I/O interface.

    Value Description
    CFG_IFACE_MEMORY Puts socket controller in memory-only interface mode.
    CFG_IFACE_MEMORY_IO Puts the socket controller in memory mode and I/O interface mode.
  • uVcc
    Specifies the Vcc voltage to use, in 0.1 volt increments.

  • uVpp1
    Specifies the Vpp1 voltage to use, in 0.1 volt increments.

  • uVpp2
    Specifies the Vpp2 voltage to use, in 0.1 volt increments.

  • fRegisters
    Specifies a bit mask indicating which registers are present. Each of these bits indicates the presence of one of the standard function and configuration registers in the attribute space of the PC Card. By calling CardRequestConfiguration, a driver can set these registers to whatever initial values the PC Card requires.

    Value Description
    CFG_REGISTER_CONFIG Indicates that the configuration option register, uConfigReg, contains data.
    CFG_REGISTER_STATUS Indicates that the function configuration and status register, uStatusReg, contains data.
    CFG_REGISTER_PIN Indicates that the pin replacement register, uPinReg, contains data.
    CFG_REGISTER_COPY Indicates that the socket and copy register, uCopyReg, contains data.
    CFG_REGISTER_EXSTATUS Indicates that the extended status register, uExtendedStatus, contains data.
    CFG_REGISTER_EXREG Indicates that the fExtRegister field exists and is valid.
  • uConfigReg
    Specifies the initial bit mask value to write to a configuration option register.

    The lower 6 bits of the configuration option register specify which configuration number to use for single function cards.

    Value Description
    FCR_COR_LEVEL_IREQ 1 = level mode interrupts, 0 = pulse mode.
    FCR_COR_SRESET 1 = soft reset.
  • uStatusReg
    Specifies the initial value to write to a function status register. The following bit mask values are defined.

    Value Description
    FCR_FCSR_INTR_ACK Acknowledge interrupt.
    FCR_FCSR_INTR Interrupt pending.
    FCR_FCSR_PWR_DOWN Place PC Card in off mode.
    FCR_FCSR_AUDIO Enable audio signal on BVD2, pin 62.
    FCR_FCSR_IO_IS_8 Used by the host to indicate 8-bit-only I/O.
    FCR_FCSR_STSCHG Enable status change, STSCHG, pin 63, from PC Card.
    FCR_FCSR_CHANGED Specifies whether one of the status-changed bits is set in the pin replacement register.
  • uPinReg
    Specifies the initial value to write to a pin replacement register.

  • uCopyReg
    Specifies the initial value to write to a socket and copy register.

  • uExtendedStatus
    Specifies the initial value to write to an extended status register.

  • fExtRegisters
    Specifies a bit mask indicating which extended registers are present. Each of these bits indicates the presence of one of the I/O function and configuration registers in the attribute space of the PC Card. By calling CardRequestConfiguration, a driver can set these registers to whatever initial values the PC Card requires. The registers will only be written to if the register presence mask indicates that they exist. The following table shows the bits and their descriptions.

    Value Description
    CFG_EXREGISTER_IOBASE0 Indicates that IOBase[0] contains data.
    CFG_EXREGISTER_IOBASE1 Indicates that IOBase[1] contains data.
    CFG_EXREGISTER_IOBASE2 Indicates that IOBase[2] contains data.
    CFG_EXREGISTER_IOBASE3 Indicates that IOBase[3] contains data.
    CFG_EXREGISTER_IOLIMIT Indicates that the I/O Limit register, IOLimit, contains data.
  • IOBase
    Specifies the values to be written to the four I/O Base registers. The four registers combine to make a 32-bit value that indicates the base I/O address that the card should listen to.

  • IOLimit
    Specifies the value to be written to the I/O Limit register. This register indicates to the card the number of significant I/O address lines.

Remarks

A Card service stores a record of the base address of the configuration registers, so there is no need for a uConfigBase member.

Requirements

OS Versions: Windows CE 1.0 and later.
Header: Cardserv.h.

See Also

CardRequestConfiguration

 Last updated on Tuesday, May 18, 2004

© 1992-2003 Microsoft Corporation. All rights reserved.