MIPS Kernel Initialization
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8/27/2008
All MIPS BSPs are required to initialize OEMTLBSize to the number of translation look-aside buffer (TLB) entries supported by the CPU minus 1 before calling KernelStart.
For example, the NEC Vr5500 MIPS CPU has 48 TLB entries. When defining OEMTLBSize for this MIPS CPU, it should look like the following example:
OEMTLBSize:
.word 47
The kernel calls OEMCacheRangeFlush to flush the instruction cache and get to a known state. The OEM must implement OEMCacheRangeFlush in the OAL.
The kernel also calls OEMCacheRangeFlush to flush the data cache and get to a known state. For more information about implementing OEMCacheRangeFlush, see OEMCacheRangeFlush Function Implementation.
The following sequence describes how the MIPS kernel is initialized by the operating system (OS):
- Implement OEMCacheRangeFlush in the OAL.
- Initialize global data for the kernel.
- Perform serial debug operations.
- Call OEMInit.
- Perform memory initializations.
- Perform other initializations.
At this point, the scheduler is able to run and schedule threads.