IntrMask

Other versions of this page are also available for the following:

• Windows Embedded CE 6.0 R3

8/27/2008

This global variable array provides the MIPS kernel with information about which nested interrupts are masked while the current interrupt is being handled.

Syntax

USHORT intrMask;

Parameters

None.

Return Value

A value of one (1) indicates the interrupt at that bit is masked.

The value is negated and shifted before programming the status register.

Remarks

MIPS Kernel

Because there is no hard-coded priority scheme in MIPS architecture, the kernel uses two structures that provide information about nested interrupts.

These structures, IntrPriority and IntrMask, provide the kernel with information about which interrupts are masked while the current interrupt is being handled:

• The IntrPriority table determines, for a given combination of simultaneously pending interrupts, which interrupt is to be given the highest priority. The resulting interrupt is serviced first.
  IntrPriority contains one entry for each combination of bits in the 6-bit interrupt field. The entry defines which interrupt should be serviced. The value is the bit number multiplied by four.
  For example, if interrupts 1 and 3 are pending, IntrPriority[0xA] = 1*4 indicates that interrupt 1 should be serviced first. Multiplying the bit number by four speeds indexing into the IntrMask array in the kernel code.

• The IntrMask table defines how to set the interrupt mask while servicing the interrupt. Access to IntrMask is gained by declaring the IntrMask variable in the OAL.
  The IntrMask table tells the kernel which interrupt mask to set in the CPU during execution of the interrupt service routine. A one (1) indicates the interrupt at that bit is masked (the value is negated and shifted before programming the status register).
  The following code example shows how IntrMask is used.

  // OEM Review : Disabled nested interrupts
  IntrMask:
  .byte   0x3f   // 00 0000   // for spurious interrupt
  .byte   0x3f   // 00 0001
  .byte   0x3f   // 00 0010
  .byte   0x3f   // 00 0100
  .byte   0x3f   // 00 1000
  .byte   0x3f   // 01 0000
  .byte   0x3f   // 10 0000
  .byte   0x00   // padding
  

SHx Kernel

In the SHx architecture, the kernel uses the IntrPriority structure to provide the kernel with information on which nested interrupts are masked when the current interrupt is being handled.

Access to IntrPriority is gained by declaring the IntrPrio variable in the OAL.

IntrPrio represents an array of 112 possible interrupts. The interrupts are values from 0x200 to 0xfe0: interrupt 0x200 is equivalent to IntrPrio[0] and 0xfe0 is equivalent to IntrPrio[111].

In the current version of the SHx kernel only initializes nesting for the first 16 interrupts. The value in each array entry identifies which interrupts are to be disabled when the current interrupt is being handled.

The following table shows the defaults that support nested interrupts.

Interrupt	Mask
0x200	0xf
0x220	0xe
0x240	0xd
0x260	0xc
0x280	0xb
0x2a0	0xa
0x2c0	0x9
0x2e0	0x8
0x300	0x7
0x320	0x6
0x340	0x5
0x360	0x4
0x380	0x3
0x3a0	0x2
0x3c0	0x1
0x3e0	0x0

To disable nested interrupts, 0xF can be assigned to each array element according to the following code example.

// OEMREVIEW : This disables interrupt nesting
//
{
    extern BYTE IntrPrio[];
    int i;
    // for each INTEVT 0x200 - 0xfe0 (0=0x200, 1=0x220, etc)
    for (i = 0; i < 0x70; i++) {
        IntrPrio[i] = 0xF;  // Mask all interrupts
    }
}

The IntrPriority table must be modified in the OEMInit function before normal operations begin.

Requirements

Header	Developer Implemented
Windows Embedded CE	Windows CE .NET 4.0 and later

See Also

Reference

IntrPrio
OEMInit