SH-4 Registers
The SH-4/3e has 16 general-purpose registers. The following table shows the roles assigned to these registers.
Register | Description |
---|---|
R0 | R0 is a temporary register when expanding assembly language pseudo-instructions. It also serves as an implicit source or destination in byte and 16-bit operations. Finally, it holds the return value on return from a function. Not preserved |
R1-R3 | Temporary registers Not preserved |
R4-R7 | Registers R4 through R7 hold the first four words of integer and nonscalar incoming arguments. The calling function constructs remaining arguments in the argument build area. The argument build area also provides space into which R4 through R7 holding arguments may spill. Not preserved |
R8-R13 | Permanent registers Preserved |
R14 | R14 is the frame pointer. Any other permanent register may serve as the frame pointer, and leaf routines may use a temporary register as the frame pointer. If a function does not establish a frame pointer, or if the function uses another register as the frame pointer, R14 is available for other purposes. Preserved |
R15 | Stack pointer, permanent register Preserved |
The SH-4 has two banks of 16 floating-point registers designated Bank0 and Bank1. This specification does not define the use of Bank1. This calling convention assigns the following roles to the SH-4 Bank0 floating-point registers.
Double-Precision Register |
Single-Precision Register |
Description |
---|---|---|
DR0 | FR0 FR1 |
DR0 is another name for FR0 and FR1 as a pair. A function returns double-precision floating-point return values in DR0. |
DR2 | FR2-FR3 | Temporary registers Not preserved |
DR4-DR10 | FR4-FR11 | The floating-point registers FR4 through FR11 hold additional single- and double-precision floating-point arguments. The calling function constructs remaining arguments in the argument build area. The argument build area also provides space into which floating-point registers holding arguments may spill. |
DR12-DR14 | FR12-FR15 | Permanent registers Preserved |
The floating-point status control (FPSCR) affects the behavior of some floating-point instructions. The section SH-4 Prolog and Epilog defines the use of the PR, SZ, and FR bits within prologs and epilogs. This Calling Sequence Specification does not define the use of these bits outside of a prolog or epilog.
See Also
SH-4 Calling Sequence Specification | SH-4 Stack Frame Layout | SH-4 Parameter Passing | SH-4 Return Values | SH-4 Prolog and Epilog | SH-4 pdata Format | SH-4 Assembler Macros
Last updated on Thursday, April 08, 2004
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