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Store Operations (SSE) 

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Microsoft Specific

The operation intrinsics listed in the following table are followed by a description of each intrinsic.

SSE intrinsics use the __m128, __m128i, and __m128d data types, which are not supported on Itanium Processor Family (IPF) processors. Any SSE intrinsics that use the __m64 data type are not supported on x64 processors.

The header file xmmintrin.h contains the declarations for the SSE intrinsics.

Memory and Initialization Store Operations

Intrinsic name Operation Corresponding instruction

_mm_store_ss

Stores the low value

MOVSS

_mm_store1_ps, _mm_store_ps1

Stores the low value across all four words

MOVSS + Shuffling

_mm_store_ps

Stores four values, address aligned

MOVAPS

_mm_storeu_ps

Stores four values, address unaligned

MOVUPS

_mm_storer_ps

Stores four values, in reverse order

MOVAPS + Shuffling

_mm_move_ss

Sets the low word, and passes in three high values

MOVSS

For an explanation of the syntax used in code samples in this topic, see Floating-Point Intrinsics Using Streaming SIMD Extensions.

END Microsoft Specific

See Also

Reference

Integer Intrinsics Using Streaming SIMD Extensions