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Defines types of scalable vector registers used in the ARM Scalable Vector Extension (SVE) architecture. These registers enable advanced SIMD operations for high-performance computing on ARM processors.
Syntax
enum ScalableVectorType
{
SVE_NONE = 0, // Not a scalable vector type
SVE_Z = 1, // SVE Z (data) registers
SVE_P = 2, // SVE P (predicate) registers
// Reserved for future scalable vector types
};
Elements
| Name | Value | Description |
|---|---|---|
| SVE_NONE | 0 | Not a scalable vector type. |
| SVE_Z | 1 | Represents scalable vector Z data register (SVE_Z). |
| SVE_P | 2 | Represents scalable vector predicate register (SVE_P). |
Remarks
The ScalableVectorType enumeration defines the types of scalable vector registers used in ARM Scalable Vector Extension (SVE) architecture. These registers are utilized for advanced SIMD operations in modern ARM processors.
Requirements
Header: cvconst.h