MIPS Calling Sequence Specification

9/7/2007

The MIPS Calling Sequence Specification for provides direction for the development of compilers and assembly language programs for the MIPS microprocessor.

In addition, the standard enables the development of tools, debuggers, and operating system utilities that perform automated walking of the call stack.

In This Section

• MIPS Registers
  Specifies the register assignment for MIPS I, II, III, and IV architectures.

• MIPS Stack Frame Layout
  Describes the MIPS stack frame layout.

• MIPS Prolog and Epilog
  Provideds reference information about code sequences and macros needed to implement Structured Exception Handling on MIPS microprocessors

Related Sections

• Differences Between Desktop and Device Compilers
  Describes differences in intrinsic functions, build options, and alignment issues.

• SEH in RISC Environments
  Describes how structured exception handling occurs in RISC microprocessor environments.