Renesas SH-4 Registers
9/7/2007
The Renesas SuperH SH-4 has 16 general-purpose registers. The following table shows the roles assigned to these registers.
Register | Description |
---|---|
R0 |
Serves as a temporary register when expanding assembly language pseudo-instructions, and holds function return values. In addition, R0 serves as an implicit source or destination in byte and 16-bit operations. Not preserved. |
R1-R3 |
Serve as temporary registers Not preserved |
R4-R7 |
Hold the first four words of integer and non-scalar incoming arguments. The argument build area provides space into which R4 through R7 holding arguments may spill. Not preserved. |
R8-R13 |
Serve as permanent registers Preserved |
R14 |
Serves as the default frame pointer. Any other permanent register may serve as the frame pointer, and leaf routines may use a temporary register as the frame pointer. Preserved. |
R15 |
Serves as the stack pointer or as a permanent register Preserved. |
The SH-4 has two banks of 16 floating-point registers designated Bank0 and Bank1. This specification does not define the use of Bank1. This calling convention assigns the following roles to the SH-4 Bank0 floating-point registers.
Double-Precision Register | Single-Precision Register | Description |
---|---|---|
DR0 |
FR0 FR1 |
Hold function return values. DR0 is another name for the single-precision registers FR0 and FR1 as a pair. |
DR2 |
FR2-FR3 |
Serve as temporary registers. DR2 is another name for FR2 and FR3 as a pair. Not preserved |
DR4-DR10 |
FR4-FR11 |
Hold single- or double-precision floating-point arguments. The argument build area also provides space into which floating-point registers holding arguments may spill. |
DR12-DR14 |
FR12-FR15 |
Serve as permanent registers. Preserved |
The floating-point status control affects the behavior of some floating-point instructions. For information about the use of the PR, SZ, and FR bits within prologs and epilogs, see Renesas SH-4 Prolog and Epilog.
See Also
Concepts
Renesas SH-4 Stack Frame Layout