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sgn - vs

  • Článek

Computes the sign of the input.

Syntax

sgn dst, src0, src1, src2

 

where

  • dst is the destination register.
  • src0 is a source register.
  • src1 is a temporary register that holds intermediate results. Following execution, contents are undefined.
  • src2 is a temporary register that holds intermediate results. Following execution, contents are undefined.

Remarks

Vertex shader versions 1_1 2_0 2_x 2_sw 3_0 3_sw
sgn x x x x x

 

This instruction works as shown below.

for each component in src0
{
   if (src0.component < 0) 
       dest.component = -1; 
   else
       if (src0.component == 0) 
           dest.component = 0; 
       else 
           dest.component = 1;
}

src1 and src2 must be different Temporary Registers.

Vertex Shader Instructions