models Package
Classes
| GSJ24CCXFactory |
Implements the 8|T⟩ → >>|<<CCX⟩ magic state factory described in Fig. 24 of Gidney, Shutty, and Jones (2024). This design converts eight T magic states into a single CCX (Toffoli) state using lattice surgery operations on 12 logical qubits (including helper qubits) with a circuit depth of 6. The output CCX error rate has two contributions:
The factory production time includes an overhead factor of (1 + 8·p_T) to account for the failure probability when consuming the T states. Reference:
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| GSJ24Factory |
Implements the magic state cultivation factory from Gidney, Shutty, and Jones (2024) for producing logical >>|<<T⟩ states from physical-level operations. Magic state cultivation gradually grows the size and reliability of a magic state within a surface code patch, using roughly the same number of physical gates as a lattice surgery CNOT gate of equivalent reliability. The approach refines ideas from Knill (1996), Jones (2016), Chamberland (2020), Gidney (2023/2024), Bombin (2024), and Hirano (2024). Compared to prior magic state distillation approaches, cultivation uses an order of magnitude fewer qubit-rounds to reach logical error rates as low as 2·10⁻⁹ under 10⁻³ uniform depolarizing circuit noise. Halving the circuit noise to 5·10⁻⁴ improves the achievable logical error rate to 4·10⁻¹¹. The factory is parameterized by pre-computed simulation data (from Monte Carlo sampling at https://doi.org/10.5281/zenodo.13777072) that maps physical error rates to (logical_error, num_qubits, volume, steps) tuples for supported distance pairs. Hyper parameters: distance: Tuple (d_color, d_surface) specifying the color code distance and surface code distance used in the cultivation protocol. Supported values are (3, 15) and (5, 15). Larger color code distance (5 vs 3) yields lower logical error rates at the cost of higher qubit count and more time steps. Reference:
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| GateBased |
A generic gate-based architecture. The error rate can be set arbitrarily and is either 1e-3 or 1e-4 in the reference. References:
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| Litinski19Factory |
T and CCZ factories based on the paper arXiv:1905.06903. It contains two categories of estimates. If the input T error rate is similar to the Clifford error, it produces magic state instructions based on Table 1 in the paper. If the input T error rate is at most 10 times higher than the Clifford error rate, it produces magic state instructions based on Table 2 in the paper. It requires Clifford error rates of at most 0.1% for CNOT, H, and MEAS_Z instructions. If these instructions have different error rates, the maximum error rate is assumed. References:
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| MagicUpToClifford |
An ISA transform that adds Clifford equivalent representations of magic
states. For example, if the input ISA contains a T gate, the provided ISA
will also contain Example: |
| Majorana |
This class models physical instructions that may be relevant for future Majorana qubits. For these qubits, we assume that measurements and the physical T gate each take 1 µs. Owing to topological protection in the hardware, we assume single and two-qubit measurement error rates (Clifford error rates) in $10^{-4}$, $10^{-5}$, and $10^{-6}$ as a range between realistic and optimistic targets. Non-Clifford operations in this architecture do not have topological protection, so we assume a 5%, 1.5%, and 1% error rate for non-Clifford physical T gates for the three cases, respectively. References:
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| NeutralAtom |
A movement-aware neutral-atom architecture with explicit atom transport. This model captures a neutral-atom device with native single-qubit
operations, Rydberg-mediated entangling gates, Z-basis measurement, and a
physical move instruction that carries hardware motion constraints. The
instruction set includes free virtual The motion model is exposed through References:
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| OneDimensionalYokedSurfaceCode |
This class models the Yoked surface code to provide a generic memory instruction based on lattice surgery instructions from a surface code like error correction code. Hyper parameters: shape_heuristic: ShapeHeuristic The heuristic to determine the shape of the surface code patch for a given number of logical qubits. (Default is ShapeHeuristic.MIN_AREA) References:
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| RoundBasedFactory |
A magic state factory that produces T gate instructions using round-based distillation pipelines. This factory explores combinations of distillation units (such as "15-to-1 RM prep" and "15-to-1 space efficient") to find optimal configurations that minimize time and space while achieving target error rates. It supports both physical-level distillation (when the input T gate is physically encoded) and logical-level distillation (using lattice surgery via surface codes). In order to account for the success probability of distillation rounds, the factory models the pipeline using a failure probability requirement (defaulting to 1%) that each round must meet. The number of distillation units per round is adjusted to meet this requirement, which in turn affects the overall space requirements. Space requirements are calculated using a user-provided function that
aggregates per-round space (e.g., sum or max). The For the enumeration of logical-level distillation units, the factory relies
on a user-provided Results are cached to disk for efficiency. References:
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| SurfaceCode |
This class models the gate-based rotated surface code. Hyper parameters: distance: int The code distance of the surface code. References:
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| SurfaceCodeLowMove |
This class models a rotated surface code tailored to a reconfigurable, zoned neutral-atom architecture with mobile ancillas. The syndrome-extraction schedule is based on a mobile-ancilla surface-code
scheme in which a single ancilla visits the data qubits of each plaquette,
combined with the atom-transport model used by Hyper parameters: distance: int The code distance of the surface code. -[ References ]-
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| ThreeAux |
This class models the pairwise measurement-based surface code with three auxiliary qubits per stabilizer measurement. Hyper parameters: distance: int The code distance of the surface code. single_rail: bool Whether to use single-rail encoding. References:
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| TwoDimensionalYokedSurfaceCode |
This class models the Yoked surface code to provide a generic memory instruction based on lattice surgery instructions from a surface code like error correction code. Hyper parameters: shape_heuristic: ShapeHeuristic The heuristic to determine the shape of the surface code patch for a given number of logical qubits. (Default is ShapeHeuristic.MIN_AREA) References:
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